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Mentor builds links for multichip package integration
Mentor, a Siemens business, has formed an alliance with foundries and OSAT providers and launched a flow that brings IC and package design together. Keith Felton, marketing manager for the Expedition...
View ArticleDAC 2017 preview: Baum
Emerging power solutions expert Baum will exhibit at the Design Automation Conference by being co-located in Verific’s DAC 2017 Booth (#639). Baum will demonstrate a soon-to-launch power analysis and...
View ArticleFast process access gets Moortec onto 7nm
Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits on SoCs that are increasingly vulnerable to the characteristics of those...
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Cadence expands system analysis to thermal
Cadence Design Systems has followed its launched of a parallelizable EM simulator with one that focuses on the thermal behavior of ICs through to multi-PCB assemblies. With Celsius, the EDA supplier...
View ArticleOnchip sensors aim for finer-granularity heat measurements
Moortec has reworked its onchip thermal-sensing architecture for the 5nm node to allow for finer-grained use on SoCs. According to the company, the Distributed Thermal Sensor (DTS), takes up seven...
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Toshiba case study describes advanced thermal simulation
A Toshiba design team has described how to achieve more accurate thermal simulation for dynamic temperature change on silicon intended for use in harsh environments. The team – comprising experts in...
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Standard arrives for thermal simulation data
A de facto standard for exchanging thermal information about designs has become a JEDEC standard. Based on XML, the JEP181 standard lets tools share data on thermal behavior, easing the job of...
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Combined database underpins 3DIC design suite
Cadence Design Systems has built a unified database to support a group of tools to support the planning and implementation of 3DIC system-in-package (SIP) designs with a focus on high-end computing and...
View ArticleHow digital twin evaluations optimize STCO-based design
System Technology Co-optimization (STCO) is one of the hot topics in electronics design. In broad terms, it is about the partitioning of an SoC into chiplets that can be designed in parallel or taken...
View ArticleCadence buys thermal software for data-center digital twins
British thermal-simulation specialist Future Facilities has agreed to be acquired by Cadence Design Systems, as the EDA company looks to expand into tools to support the design and maintenance of data...
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